[Wien] compilation aborted for lap_bp.f (code 1)

Gerhard Fecher fecher at uni-mainz.de
Tue Jun 7 11:04:17 CEST 2011


What was the error message of the compiler ???

By the way
The latest stable version of the 11.1 compiler was 11.1.075
older ones contain an overestimation that you can easily find when you search this forum
and the same procedure as every week
http://software.intel.com/en-us/articles/intel-mkl-link-line-advisor/

and about compiler switches the Intel manual for 11.1 tells for example
(see also the section Deprecated and Removed Compiler Options in the manual)

ax, Qax

Tells the compiler to generate multiple, processor-specific auto-dispatch code paths for Intel processors if there is a performance benefit. 

IDE Equivalent
Windows: Code Generation > Add Processor-Optimized Code Path

Optimization > Generate Alternate Code Paths

Linux: None

Mac OS X: Code Generation > Add Processor-Optimized Code Path 

Architectures
IA-32, Intel® 64 architectures

Syntax
Linux and Mac OS X:
 -axprocessor
 
Windows:
 /Qaxprocessor
 

Arguments
processor
 Indicates the processor for which code is generated. The following descriptions refer to Intel® Streaming SIMD Extensions (Intel® SSE) and Supplemental Streaming SIMD Extensions (Intel® SSSE). Possible values are:

SSE4.2
 Can generate Intel® SSE4 Efficient Accelerated String and Text Processing instructions supported by Intel® Core™ i7 processors. Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator, Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for the Intel® Core™ processor family.
 
SSE4.1
 Can generate Intel® SSE4 Vectorizing Compiler and Media Accelerator instructions for Intel processors. Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions and it can optimize for Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture. This replaces value S, which is deprecated.
 
SSSE3
 Can generate Intel® SSSE3, SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for the Intel® Core™2 Duo processor family. For Mac OS* X systems, this value is only supported on Intel® 64 architecture. This replaces value T, which is deprecated.
 
SSE3
 Can generate Intel® SSE3, SSE2, and SSE instructions for Intel processors and it can optimize for processors based on Intel® Core™ microarchitecture and Intel NetBurst® microarchitecture. For Mac OS* X systems, this value is only supported on IA-32 architecture. This replaces value P, which is deprecated.
 
SSE2
 Can generate Intel® SSE2 and SSE instructions for Intel processors, and it can optimize for Intel® Pentium® 4 processors, Intel® Pentium® M processors, and Intel® Xeon® processors with Intel® SSE2. This value is not available on Mac OS* X systems. This replaces value N, which is deprecated.
 
 

Default
OFF
 No auto-dispatch code is generated. Processor-specific code is generated and is controlled by the setting of compiler option -m (Linux), compiler option /arch (Windows), or compiler option -x (Mac OS* X).
 

Description
This option tells the compiler to generate multiple, processor-specific auto-dispatch code paths for Intel processors if there is a performance benefit. It also generates a baseline code path. The baseline code is usually slower than the specialized code.

The baseline code path is determined by the architecture specified by the -x (Linux and Mac OS X) or /Qx (Windows) option. While there are defaults for the -x or /Qx option that depend on the operating system being used, you can specify an architecture for the baseline code that is higher or lower than the default. The specified architecture becomes the effective minimum architecture for the baseline code path. 

If you specify both the -ax and -x options (Linux and Mac OS X) or the /Qax and /Qx options (Windows), the baseline code will only execute on processors compatible with the processor type specified by the -x or /Qx option. 

This option tells the compiler to find opportunities to generate separate versions of functions that take advantage of features of the specified Intel® processor. 

If the compiler finds such an opportunity, it first checks whether generating a processor-specific version of a function is likely to result in a performance gain. If this is the case, the compiler generates both a processor-specific version of a function and a baseline version of the function. At run time, one of the versions is chosen to execute, depending on the Intel processor in use. In this way, the program can benefit from performance gains on more advanced Intel processors, while still working properly on older processors.

You can use more than one of the processor values by combining them. For example, you can specify -axSSE4.1,SSSE3 (Linux and Mac OS X) or /QaxSSE4.1,SSSE3 (Windows). You cannot combine the old style, deprecated options and the new options. For example, you cannot specify -axSSE4.1,T (Linux and Mac OS X) or /QaxSSE4.1,T (Windows). 

Previous values W and K are deprecated. The details on replacements are as follows:

Mac OS X systems: On these systems, there is no exact replacement for W or K. You can upgrade to the default option -msse3 (IA-32 architecture) or option -mssse3 (Intel® 64 architecture).

Windows and Linux systems: The replacement for W is -msse2 (Linux) or /arch:SSE2 (Windows). There is no exact replacement for K. However, on Windows systems, /QaxK is interpreted as /arch:IA32; on Linux systems, -axK is interpreted as -mia32. You can also do one of the following: 

Upgrade to option -msse2 (Linux) or option /arch:SSE2 (Windows). This will produce one code path that is specialized for Intel® SSE2. It will not run on earlier processors

Specify the two option combination -mia32 -axSSE2 (Linux) or /arch:IA32 /QaxSSE2 (Windows). This combination will produce an executable that runs on any processor with IA-32 architecture but with an additional specialized Intel® SSE2 code path.

The -ax and /Qax options enable additional optimizations not enabled with option -m or option /arch. 

Alternate Options
None

See Also
x, Qx compiler option
m compiler option
arch compiler option
Ciao
Gerhard

====================================
Dr. Gerhard H. Fecher
Institut of Inorganic and Analytical Chemistry
Johannes Gutenberg - University
55099 Mainz
________________________________________
Von: wien-bounces at zeus.theochem.tuwien.ac.at [wien-bounces at zeus.theochem.tuwien.ac.at]" im Auftrag von "shamik chakrabarti [shamikphy at gmail.com]
Gesendet: Dienstag, 7. Juni 2011 10:35
Bis: A Mailing list for WIEN2k users
Betreff: [Wien] compilation aborted for lap_bp.f (code 1)

Dear wien2k users,

                          We have tried to install wien2k in a 64 bit system using compiler 11.1.046.
                          The OPTIONS used are given below:

current:FOPT:-FR -mp1 -w -prec_div -pad -ip -O3 -axTW -traceback
current:FPOPT:$(FOPT)
current:LDFLAGS:$(FOPT) -L/opt/intel/Compiler/11.1/046/lib/intel64 -static-intel -Bstatic -lguide -lguide_stats -lsvml -Bdynamic -lpthread
current:DPARALLEL:'-DParallel'
current:R_LIBS:-L/opt/intel/Compiler/11.1/046/mkl/lib/em64t -lguide -lpthread
current:RP_LIBS:-lmkl_intel_lp64 -lmkl_scalapack_lp64 -lmkl_blacs_lp64 -lmkl_sequential -lmkl_em64t

All the programs were compiled properly except lapwso. 1 error appeared as follows:

compilation aborted for lap_bp.f (code 1)
make: *** [lap_bp.o] Error 1

We are not able to proceed any further. Any response in this regard will be appreciated. Thanks in advance,

with best regards,
--
Shamik Chakrabarti
Research Scholar
Dept. of Physics & Meteorology
Material Processing & Solid State Ionics Lab
IIT Kharagpur
Kharagpur 721302
INDIA


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