[Wien] 2 XEON 5355 or 4 XEON 5150?

[Florent Boucher]

According to what I know on the iterative scheme (very few but just a 
bit of experience with VASP and CASTEP), the memory band width is much 
more important for such a scheme compare to ful diagonalization.
So, I suspect that the architecture could behave differently.

> b) I do NOT expect big differences in performance behaviour between
> full and iterative diagonalization except that the performance of the
> blas-library is "less important" simply because the diagonalization time
> is now much smaller, so hamilt and hns gets more important.(i.e. AMD 
> will "benefit" from that)
>
>   

good idea.
I did it already in the past for an MPI test and we have very useful 
informations.

> c) I'd consider it more important to have also the timing of HAMILT, HNS 
> and DIAG, because this allows to judge the performance of the compiler 
> (HAMILT), of the blas-library (DIAG) and a "mixed" value (HNS).
> (grep HORB *output1)
>
>   



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